• views: 268
• date: 9 September 2025
• posted by: AD-TEAM

analysis, coding and simulation

What you'll learn
FPGA filter design and simulation
Requirements
verilog basic knowledge
Description
This series of lessons will focus on the FPGA filter algorithm design and simulation. It currently includes three parts (It might include more in the future):(1) FPGA Mean (Average) Filter:The Mean filter, or average filter is windowed filter of linear class, that smoothes signal (image). The filter works as low-pass one. The basic idea behind filter is for any element of the signal (image) take an average across its neighborhood.(2) FPGA Median Filter:The median filter is a non-linear digital filtering technique, often used to remove noise from an image or signal. Such noise reduction is a typical pre-processing step to improve the results of later processing (for example, edge detection on an image). Median filtering is very widely used in digital image processing because, under certain conditions, it preserves edges while removing noise, also having applications in signal processing.The main idea of the median filter is to run through the signal entry by entry, replacing each entry with the median of neighboring entries. The pattern of neighbors is called the "window", which slides, entry by entry, over the entire signal.(3) FPGA Gaussian Filter:In electronics and signal processing, a Gaussian filter is a filter whose impulse response is a Gaussian function (or an approximation to it, since a true Gaussian response is physically unrealizable as it has infinite support). Gaussian filters have the properties of having no overshoot to a step function input while minimizing the rise and fall time. This behavior is closely connected to the fact that the Gaussian filter has the minimum possible group delay. It is considered the ideal time domain filter, just as the sinc is the ideal frequency domain filter. These properties are important in areas such as oscilloscopes and digital telecommunication systems.Mathematically, a Gaussian filter modifies the input signal by convolution with a Gaussian function; this transformation is also known as the Weierstrass transform.

Overview

Section 1: FPGA Mean (Average) Filter

Lecture 1 FPGA Mean (Average) Filter 01 – Introduction

Lecture 2 FPGA Mean (Average) Filter 02 – Coding

Lecture 3 FPGA Mean (Average) Filter 03 – Simulation

Section 2: FPGA Median Filter

Lecture 4 FPGA Median Filter 01 – Introduction

Lecture 5 FPGA Median Filter 02 – Sort Module Coding

Lecture 6 FPGA Median Filter 03 – Sort Module Simulation

Lecture 7 FPGA Median Filter 04 – Median Module Coding

Lecture 8 FPGA Median Filter 05 – Median Module Simulation

Section 3: FPGA Gaussian Filter

Lecture 9 FPGA Gaussian Filter 01 – Introduction

Lecture 10 FPGA Gaussian Filter 02 – Coding

Lecture 11 FPGA Gaussian Filter 03 – Simulation

FPGA learner




   
   
   

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