• views: 242
• date: 30 September 2025
• posted by: voska89

Synopsys StarRC, the Gold standard parasitic extraction solution, is a key component of the Synopsys Digital Design and the Synopsys Custom Design Families. Synopsys StarRC provides a silicon-accurate and high-performance extraction solution for SoC, custom digital, analog/mixed-signal, memory and 3DIC designs. The Synopsys StarRC solution offers modeling of physical effects for advanced process technologies, including FinFET technologies at 16nm, 14nm, 10nm, 7nm, 5nm, 3nm and beyond. Its seamless integration with industry standard digital and custom implementation systems, physical verification timing, signal integrity, power, thermal and circuit simulation flows deliver unmatched ease-of-use and productivity to speed design closure and signoff verification.
Smarter Parasitic Extraction for Faster Multi-corner Turnaround Time | Synopsys
This video provides an overview of StarRC Simultaneous Multi-corner extraction (SMC), which offers designers an intelligent, scalable solution to maximize both extraction performance and existing compute farm resources. This technology has been adopted by market leaders in mobile, networking, and server applications to shorten extraction TAT and meet demanding sign-off schedules.
Synopsys, Inc.is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia.








   
   
   

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