Design A Cpu 2

Date: 25 June 2023 | Posted by: voska89

Free Download Design A Cpu 2
Published 6/2023
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz
Language: English | Size: 11.02 GB | Duration: 13h 6m
Computer Architecture Organisation and Design

What you'll learn
Mico-Coded Control Unit Design
Addressing Modes
Assembler in Python
CPU Mertrics
Labels and Declarations
Port Mapped Input Output
Memory Mapped Input Output
The Stack
Subroutines
High Level Language Constructs in Assembly Language
16 Bit Machine with 90 Instructions
Requirements
Completed first course Design a CPU
Description
In this course we take what we learned from the first course and expand on the simple 8 bit design and create a 16 bit machine with a maximum of 64 instructions with each instruction having access to 4 different addressing modes. We cover port mapped i/o and memory mapped i/o. We start using a new faster more stable version of Logisim. The hard wired control unit is replaced with a mixed hardwired and microcoded control unit. We increase the number of general purpose registers from 4 to 6 and add in a temporary register, index register , stack pointer register and floating point unit register.We design a new assembler in python to help us write the assembly language code with our new larger instruction set. Finally we add on a keyboard a character display and a graphics display. The 64 Kbyte address space is split into a ROM that contains the start of an operating system and commonly used subroutines and a RAM that contains the program code and data.If you want to know how to build a fully functioning 16 bit machine and design some cool assembly language programs then this is the course you need to take.Don't just read about theory and imaginary machines , build an actual machine that works. It's the best way of learning Computer Architecture Design and Organisation.
Overview
Section 1: Introduction
Lecture 1 Introduction
Lecture 2 The CPU
Lecture 3 Assembler / Debugger
Lecture 4 Load and Run
Section 2: Add Subtract Multiply Divide
Lecture 5 Count to Three
Lecture 6 Add Subtract
Lecture 7 Multiply Divide
Lecture 8 CPU and Algorithm Metrics
Section 3: Assembler and Compiler
Lecture 9 Assembler Labels and Declarations
Lecture 10 Compile and Assemble
Section 4: Update Design
Lecture 11 Roadmap for Next 10 Videos
Lecture 12 New Reset Method
Section 5: Port Mapped I/O
Lecture 13 Input Output Instruction
Lecture 14 Input Device
Lecture 15 Output Device
Lecture 16 New Completed Input Output
Section 6: Port to Logisim Evolution
Lecture 17 Port to Logisim Evolution
Section 7: 16 Bit Machine
Lecture 18 16 Bit Machine
Section 8: Memory Mapped I/O
Lecture 19 Memory Mapped IO Theory
Lecture 20 Memory Mapped IO Circuits
Section 9: Micro-Coded Control Unit
Lecture 21 Hardwired v Micro-Coded Control Unit
Lecture 22 Transition to Micro-Coded Control Unit
Lecture 23 Micro-Coded Control Unit Explained
Lecture 24 Mixed Micro-Coded and Hard Wired Control Unit
Lecture 25 Mapping Instructions to ROM
Lecture 26 Compression ROM
Section 10: The Stack
Lecture 27 New Design Overview
Lecture 28 Stack 1 Theory
Lecture 29 Stack 2 Implemetation
Lecture 30 Stack 3 Instructions
Section 11: Architecture and Addressing Modes
Lecture 31 Addressing Modes Introduction
Lecture 32 Architecture 1
Lecture 33 Architecture 2
Lecture 34 Full Instruction Set
Lecture 35 Implementing Addressing Mode in MicroCode
Lecture 36 Architecture 3
Lecture 37 Architecture 4
Section 12: Keyboard Screen and Graphics Display
Lecture 38 Keyboard
Lecture 39 Keyboared Example
Lecture 40 Display
Lecture 41 Display Example
Section 13: Assembler
Lecture 42 Install Python
Lecture 43 First Assembly Language Program
Lecture 44 Loops and Labels
Lecture 45 EQU and DS Assembler Directives
Lecture 46 Factorial Example
Lecture 47 Greatest Common Divisor
Lecture 48 DS , DC , EQU Assembler Directives Compared
Section 14: Subroutines
Lecture 49 Read and Write Characters
Lecture 50 (get_char) and (print_char) Subroutines
Section 15: Goodbye
Lecture 51 Next Course
This course is aimed at people who want to learn Computer Architecture Organisation and Design by building their very own Computer as opposed to learning from imaginary machines.

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